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<H2>AS2650  Assembler</H2>

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<H4><B><PRE>
2650 REGISTER SET 

The following is a list of the 2650 registers used by AS2650:  

        r0,r1   -       8-bit accumulators
        r2,r3

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<H4><B><PRE>
2650 INSTRUCTION SET 

   The  following  tables  list all 2650 mnemonics recognized by
the AS2650 assembler.  The designation [] refers to  a  required
addressing  mode  argument.   The designation CC refers to a re-
quired condition code argument:   .eq.,  .gt.,  .lt.,  .un.,  or
value  of 0-3.  The following list specifies the format for each
addressing mode supported by AS2650:  

        #data           immediate byte data

        r0,r1,r2,r3     registers

        addr            location/branch address

        [addr]     or   indirect addressing
        @addr

        [addr,r0]  or   register indexed
        @addr,r0        indirect addressing

        [addr,-r0] or   autodecrement register indexed
        @addr,-r0       indirect addressing

        [addr,r0+] or   autoincrement register indexed
        @addr,r0+       indirect addressing



AS2650 ASSEMBLER                                       PAGE AB-2
2650 INSTRUCTION SET


        .eq.            CC: equal               (== 0)
        .gt.            CC: greater than        (== 1)
        .lt.            CC: less than           (== 2)
        .un.            CC: unconditional       (== 3)

The terms data, label, and addr may all be expressions.  

   Note  that  not all addressing modes are valid with every in-
struction, refer to the 2650 technical data for valid modes.  

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<H4><B><PRE>
Load / Store Instructions 

        lodz    r               lodi    #data
        lodr    []              loda    []

        stoz    r
        stor    []              stoa    []


Arithmetic / Compare Instructions 

        addz    r               addi    #data
        addr    []              adda    []

        subz    r               subi    #data
        subr    []              suba    []

        comz    r               comi    #data
        comr    []              coma    []

        dar     r


Logical / Rotate Instructions 

        andz    r               andi    #data
        andr    []              anda    []

        iorz    r               iori    #data
        iorr    []              iora    []

        eorz    r               eori    #data
        eorr    []              eora    []

        rrr     r
        rrl     r


Condition Code Branches 

        bctr    CC,[]           bcta    CC,[]

        bcfr    CC,[]           bcfa    CC,[]

        bstr    CC,[]           bsta    CC,[]

        bsfr    CC,[]           bsta    CC,[]


Register Test Branches 

        brnr    r,[]            brna    r,[]

        birr    r,[]            bira    r,[]

        bdrr    r,[]            bdra    r,[]

        bsnr    r,[]            bsna    r,[]


Branches (to Subroutines) / Returns 

        bxa     []              bsxa    []

        zbrr    []              zbsr    []

        retc    CC              rete    CC


Input / Output 

        redc    r               wrtc    r
        redd    r               wrtd    r
        rede    r,addr          wrte    r,addr


Miscellaneos 

        halt                    nop
        tmi     r,#data

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<H6><P><B>Last Updated: April 2009</B></P></H6>
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